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FUJITSU SEMICONDUCTOR DATA SHEET
DS07-12509-7E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89120/120A Series
MB89121/P131/123A/P133A/125A/P135A/ MB89PV130A
s DESCRIPTION
The MB89120 series is a line of single-chip microcontrollers containing a compact instruction set and a great variety of peripheral functions such as a timer, serial interface, and external interrupt. The MB89120A series is an extended variant of the MB89120, with a remote control transmission function and wake-up interrupt function.
s FEATURES
* * * * * * * * * * * * * * F2MC-8L family CPU core Low-voltage operation Low current consumption (allowing for dual clock) Minimum execution time : 0.95 s at 4.2 MHz 21-bit timebase counter I/O ports : Max. 36 ports External interrupts : 3 channels External interrupts (wake-up function) : 8 channels (only for the MB89120A series) 8-bit serial I/O : 1 channel 8/16-bit timer/counter : 1 channel Built-in remote-control transmitting frequency generator (only for the MB89120A series) Low-power consumption modes (stop mode, sleep mode, watch mode) Package : QFP-48 CMOS technology
s PACKAGE
48-pin plastic QFP
(FPT-48P-M13)
MB89120/120A Series
s PRODUCT LINEUP
Part number Item Classification MB89121 MB89123A MB89125A MB89P133A MB89P131
Mass-produced products (Mask ROM products) 4 K x 8 bits (internal mask ROM) 128 x 8 bits The number of instructions Instruction bit length Instruction length Data bit length Minimum execution time Minimum interrupt processing time Output ports (N-ch open-drain) Output ports (CMOS) I/O ports (CMOS) Total 8 K x 8 bits (internal mask ROM)
One-time products
ROM size
8 K x 8 bits 4 K x 8 bits (Internal PROM to (Internal PROM 16 K x 8 bits be programmed to be programmed (internal mask with a generalwith a generalROM) purpose EPROM purpose EPROM programmer) programmer) 256 x 8 bits : 136 : 8 bits : 1 to 3 bytes : 1, 8, 16 bits : 0.95 s at 4.2 MHz : 8.57 s at 4.2 MHz : 4 (All also serves as peripherals.) :8 : 24 (8 ports also serve as peripherals.) : 36 128 x 8 bits
RAM size
CPU functions
Ports
Timer/counter Serial I/O
8-bit timer/counter x 2 channels or 16-bit event counter x 1 channel 8 bits LSB/MSB first selectable 3 Independent channels (edge selection, interrupt vector, source flag) Rising edge/falling edge/both edges selectable Also for wake-up from stop/sleep mode (edge detection is also permitted in stop mode) 8 channels (only for level detection) 1 channel (pulse width and frequency selectable by program) Sleep mode, stop mode, watch mode CMOS 2.2 V to 4.0 V (with the dual clock option) 2.2 V to 6.0 V (with the single clock option) 2.7 V to 6.0 V
External interrupt 1 External interrupt 2 (wake-up function) Remote control transmitting frequency generator Standby mode Process Operating voltage* EPROM for use
* : Varies with conditions such as operating frequencies. (See "s ELECTRICAL CHARACTERISTICS".) (Continued)
2
MB89120/120A Series
(Continued) Part number
Item Classification ROM size RAM size
MB89P135A One-time PROM products 16 K x 8 bits (internal PROM, to be programmed with general-purpose EPROM programmer) 512 x 8 bits The number of instructions Instruction bit length Instruction length Data bit length Minimum execution time Minimum interrupt processing time Output ports (N-ch open-drain ports) Output ports (CMOS) I/O ports (CMOS) Total
MB89PV130A Piggyback/evaluation product 32 K x 8 bits (external ROM) 1 K x 8 bits : 136 : 8 bits : 1 to 3 bytes : 1, 8, 16 bits : 0.95 s at 4.2 MHz : 8.57 s at 4.2 MHz : 4 (All also serve as peripherals.) :8 : 24 (8 ports also serve as peripherals.) : 36
CPU functions
Ports
Timer/counter Serial I/O
8-bit timer/counter x 2 channels or 16-bit event counter x 1 channel 8 bits LSB/MSB first selectable 3 independent channels (edge selection, interrupt vector, source flag) Rising/falling/both edges selectable Used also for wake-up from stop/sleep mode. (Edge detection is also permitted in stop mode.) 8 channels (only for level detection)
External interrupt 1
External interrupt 2 (wake-up function) Remote control transmitting frequency generator Standby mode Process Operating voltage EPROM for use
1 channel (Pulse width and cycle selectable by program) Sleep mode, stop mode, and clock mode CMOS 2.7 V to 6.0 V 2.7 V to 6.0 V MBM27C256A-20TVM
3
MB89120/120A Series
s PACKAGE AND CORRESPONDING PRODUCTS
Package FPT-48P-M13 MQP-48C-P01 Package FPT-48P-M13 MQP-48C-P01 x x MB89P135A x MB89PV130A x x x x MB89121 MB89123A MB89125A MB89P133A MB89P131
: Available, x : Not available Note : Package details of OTPROM products and piggyback/evaluation products are common to those of MB89130/ 130A series. Refer to the MB89130/130A series data sheet for details.
s DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the one-time ROM product, verify its difference from the product that will actually be used. Take particular care on the following points : * The number of register banks available is different between the MB89121 and the MB89123A/125A/P135A/ PV130A. * The stack area, etc., is set at the upper limit of the RAM.
2. Current Consumption
* When operated at low speed, a product with an OTPROM (EPROM) will consume more current than a product with a mask ROM. However, the same is current consumption in the sleep/stop mode is the same. (For more information, see "s ELECTRICAL CHARACTERISTICS".) * In the case of the MB89PV130A, added is the current consumed by the EPROM which is connected to the top socket.
3. Mask Options
Functions that can be selected as options and how to designate these options vary with product. Before using options, check "s MASK OPTIONS". Take particular care on the following point : * Pull-up resistor can't be set for P40 to P43 on the MB89P135A. * Options are fixed on the MB89PV130A.
4
MB89120/120A Series
s PIN ASSIGNMENT
(TOP VIEW)
P40 P41 P42 P43 AVR AVSS P30/SCK P31/SO P32/SI P33/EC/SCO P34/TO/INT0 P35/INT1 AVCC RST MOD0 MOD1 X0 X1 VCC X0A X1A P27 P26 P25 1 2 3 4 5 6 7 8 9 10 11 12 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
Note : Parenthesized function is available only for the MB89120A series.
P24 P23 P22 P21 P20 P17 VSS P16 P15 P14 P13 P12
13 14 15 16 17 18 19 20 21 22 23 24
P36/INT2 P37/BZ/(RCO) P00/(INT20) P01/(INT21) P02/(INT22) P03/(INT23) P04/(INT24) P05/(INT25) P06/(INT26) P07/(INT27) P10 P11
(FPT-48P-M13)
5
MB89120/120A Series
s PIN DESCRIPTION
Pin no. 5 6 8 9 3 4 Pin name X0 X1 X0A X1A MOD0 MOD1 Circuit type A B C Function Main clock crystal oscillator pins (max. 4.2 MHz) Subclock crystal oscillator pins (for 32.768 kHz) Operation mode select pins Connect these pins directly to VSS. Reset I/O pin This port is of N-ch open-drain output type with pull-up resistor and a hysteresis input type. The internal circuit is initialized by the input of "L". "L" is output from this pin by an internal reset source as optional setting. General-purpose I/O ports On the MB89120A series, these pins also serve as external interrupt input. External interrupt input is hysteresis input. General-purpose I/O ports General-purpose output-only ports General-purpose I/O port Also serves as clock I/O for the 8-bit serial I/O interface. This port is of hysteresis input type. General-purpose I/O port Also serves as a serial I/O data output. This port is hysteresis input type. General-purpose I/O port Also serves as a serial I/O data input. This port is hysteresis input type. General-purpose I/O port Also serves as the external clock input for the 8-bit timer/ counter. This port is hysteresis input type. System clock output is optional. General-purpose I/O port Also serves as the overflow output and external interrupt input for the 8-bit timer/counter. This port is hysteresis input type. General-purpose I/O ports Also serve as an external interrupt input. These ports are hysteresis input type. General-purpose I/O port Also serves as a buzzer output. This port is hysteresis 35 P37/BZ/ (RCO) F input type. On the MB89120A series, the pin also serves as a remote control output.
2
RST
D
27 to 34
P07/ (INT27) to P00/ (INT20) P17 to P10 P27 to P20 P30/SCK
I
18, 20 to 26 10 to 17 42
E G F
41
P31/SO
F
40
P32/SI
F
39
P33/EC/SCO
F
38
P34/TO/INT0
F
36, 37
P36/INT2, P35/INT1
F
(Continued)
6
MB89120/120A Series
(Continued) Pin no.
45 to 48 7 19 1 44 43
Pin name P43 to P40 VCC VSS AVCC AVR AVSS
Circuit type H -- -- -- -- -- Power supply pin
Function N-ch open-drain output ports Power supply (GND) pin Power supply (GND) pin Use this pin at the same voltage as VCC. Reference voltage input pin Power supply (GND) pin Use this pin at the same voltage as VSS.
7
MB89120/120A Series
s I/O CIRCUIT TYPE
Type
X1 X0
Circuit
Remarks * Crystal and ceramic oscillation type (main clock) * Cricuit for the MB89P133A/P131/P135A/PV130A * External clock input select versions of MB89121/ 123A/125A At an oscillation feedback resistor of approximately 1 M / 5 V
Standby control signal
A
X1
X0
* Crystal and ceramic oscillation type (main clock) * Crystal or ceramic oscillator select versions of MB89121/123A/125A At an oscillation feedback resistor of approximately 1 M / 5 V
Standby control signal X1A
X0A
* Crystal and ceramic oscillation type (sub clock) Circuit for the MB89121/123A/125A At an oscillation feedback resistor of approximately 4.5 M / 5 V
B
X1A
Standby control signal
X0A
* Crystal and ceramic oscillation type (sub clock) Circuit for the MB89P131/P133A/P135A/PV130A At an oscillation feedback resistor of approximately 4.5 M / 5 V
Standby control signal
C * Output pull-up resistor (P-ch) of approximately 50 k / 5 V * Hysteresis input
R P-ch
D
N-ch
(Continued)
8
MB89120/120A Series
(Continued) Type
R P-ch P-ch
Circuit
Remarks * CMOS output * CMOS input * Pull-up resistor optional
E
N-ch
R
P-ch P-ch
* CMOS output * Hysteresis input * Pull-up resistor optional
F
N-ch
* CMOS output
P-ch
G
N-ch
R P-ch
* N-ch open-drain output * Pull-up resistor optional
H
P-ch N-ch
R P-ch P-ch
* CMOS output * CMOS input * The interrupt input is a hysteresis input (available only for the MB89120A series) . * Pull-up resistor optional
I
N-ch
Interrupt input Only for the MB89120A series
9
MB89120/120A Series
s HANDLING DEVICES
1. Preventing Latchup
Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins other than medium- and high- voltage pins, or if higher than the voltage which shows on "1. Absolute Maximum Ratings" in "s ELECTRICAL CHARACTERISTICS" is applied between VCC and VSS. When latchup occurs, power supply current increases rapidly, and might thermally damage elements. When using, take great care not to exceed the absolute maximum ratings. Also, take care to prevent the analog power supply (AVCC and AVR) and analog input from exceeding the digital power supply (VCC) when the analog system power supply is turned on and off.
2. Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. They should be connected to pull-up or pull-down resistor.
3. Treatment of N.C. Pins
Be sure to leave N.C. (internally connected) pins open.
4. Power Supply Voltage Fluctuations
Although operation is assured within the rated range of VCC power supply voltage, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched.
5. Precautions when Using an External Clock
When an external clock is used, oscillation stabilization time is required even for power-on reset (optional) and release from stop mode.
6. Turning on the supply voltage (only for the MB89P135A)
When the power supply is turned on if MB89P135A is used, power on sharply up to 2.0 V within 13 clock cycles after starting of oscillation. Further, various option may be set, if power supply up to keep this condition.
10
MB89120/120A Series
s PROGRAMMING TO THE EPROM ON THE MB89P131
The MB89P131 is a one-time PROM version of the MB89121.
1. Features
* 4-Kbyte PROM on chip * Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in EPROM mode is diagrammed below :
Address 0000H I/O Not available RAM 0000H Not available F000H 7000H Not available Single chip EPROM mode (Corresponding addresses in the EPROM programmer)
PROM 4 KB
EPROM 4 KB
FFFFH
7FFFH
3. Programming to the EPROM
In EPROM mode the MB89P131 functions equivalent to the MBM27C256A. This allows the EPROM to be programmed with a general-purpose EPROM programmer by using the dedicated socket adapter. Note, however, that the electronic signature mode cannot be used. * Programming procedure (1) Set the EPROM programmer to MBM27C256A. (2) Load program data into the EPROM programmer at 7000H to 7FFFH (note that addresses F000H to FFFFH while operating as a single chip correspond to 7000H to 7FFFH in EPROM mode) . (3) Program with the EPROM programmer.
11
MB89120/120A Series
s PROGRAMMING TO THE EPROM ON THE MB89P133A
The MB89P133A is a one-time PROM version of the MP89123A.
1. Features
* 8-Kbyte PROM on chip * Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in EPROM mode is diagrammed below :
Address 0000H I/O RAM 0000H Not available Single chip EPROM mode (Corresponding addresses in the EPROM programmer)
Not available
E000H PROM 8 KB
6000H EPROM 8 KB
FFFFH
7FFFH
3. Programming to the EPROM
In EPROM mode the MB89P133A functions equivalent to the MBM27C256A, This allows the EPROM to be programmed with a general-purpose EPROM programmer by using the dedicated socket adapter. Note, however, that the MB89P133A cannot use the electronic signature mode. * Programming procedure (1) Set the EPROM programmer to MBM27C256A. (2) Load program data into the EPROM programmer at 6000H to 7FFFH (note that addresses E000H to FFFFH while operating as a single chip correspond to 6000H to 7FFFH in EPROM mode) . (3) Program with the EPROM programmer.
12
MB89120/120A Series
s PROGRAMMING TO THE EPROM ON THE MB89P135A
The MB89P135A is an OTPROM version of the MB89123A/125A.
1. Features
* 16-Kbyte PROM on chip * Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in EPROM mode is diagrammed below.
Address 0000H I/O 0080H RAM 0280H Not available 8000H Not available BFF0H Not available BFF6H Not available C000H 4000H 3FF6H Vacancy (Read value FFH) 3FF0H Option area 0000H Vacancy (Read value FFH) Single chip
EPROM mode (Corresponding addresses on the EPROM programmer)
PROM 16 KB
EPROM 16 KB
FFFFH
7FFFH
3. Programming to the EPROM
In EPROM mode, the MB89P135A functions equivalent to the MBM27C256A. This allows the PROM to be programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. * Programming procedure (1) Set the EPROM programmer to the MBM27C256A. (2) Load program data into the EPROM programmer at 4000H to 7FFFH (note that addresses C000H to FFFFH while operating as a single chip correspond to 4000H to 7FFFH in EPROM mode) . (3) Load option data into the EPROM programmer at 3FF0H to 3FF6H. (4) Program with the EPROM programmer.
13
MB89120/120A Series
4. Setting OTPROM Options (MB89P135A Only)
The programming procedure is the same as that for the PROM. Options can be set by programming values at the addresses shown on the memory map. The relationship between bits and options is shown on the following bit map : * OTPROM option bit map Address Bit 7 Vacancy 3FF0H Readable and writable P07 Pull-up 1 : Yes 0 : No P17 Pull-up 1 : Yes 0 : No P37 Pull-up 1 : Yes 0 : No Vacancy 3FF4H Readable and writable Vacancy 3FF5H Readable and writable Vacancy 3FF6H Readable and writable Bit 6 Vacancy Readable and writable P06 Pull-up 1 : Yes 0 : No P16 Pull-up 1 : Yes 0 : No P36 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Bit 5 Vacancy Readable and writable P05 Pull-up 1 : Yes 0 : No P15 Pull-up 1 : Yes 0 : No P35 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Bit 4 Bit 3 Bit 2 Power-on reset 1 : Yes 0 : No P02 Pull-up 1 : Yes 0 : No P12 Pull-up 1 : Yes 0 : No P32 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Bit 1 Bit 0 Clock mode selection Reset pin output 1 : Single clock 1 : Yes 0 : Dual 0 : No clock P04 Pull-up 1 : Yes 0 : No P14 Pull-up 1 : Yes 0 : No P34 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable P03 Pull-up 1 : Yes 0 : No P13 Pull-up 1 : Yes 0 : No P33 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Oscillation stabilization time 00 : 22/FCH 10 : 216/FCH 01 : 212/FCH 11 : 218/FCH P01 Pull-up 1 : Yes 0 : No P11 Pull-up 1 : Yes 0 : No P31 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable P00 Pull-up 1 : Yes 0 : No P10 Pull-up 1 : Yes 0 : No P30 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable
3FF1H
3FF2H
3FF3H
Note : Each bit is set to "1" as the initialized value, therefore the pull-up option is selected.
14
MB89120/120A Series
s HANDLING MB89P131/P133A/P135A
1. Recommended Screening Conditions
High-temperature aging is recommended as the pre-assembly screening procedure.
Program, verify
Aging +150 C, 48 h
Data verification
Assembly
2. Programming Yield
Due to its nature, bit programming test can't be conducted as Fujitsu delivery test. For this reason, a programming yeild of 100% cannot be assured at all times.
3. EPROM Programmer Socket Adapter
Part no. MB89P131PF MB89P133APFM MB89P135APFM Inquiry : Sun Hayato Co., Ltd. : TEL (81) -3-3986-0403 FAX (81) -3-5396-9106 QFP-48 ROM-48QF2-28DP-8L Package Compatible socket adapter Sun Hayato Co., Ltd.
15
MB89120/120A Series
s PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE
1. EPROM for Use
MBM27C256A-20TVM
2. Programming Socket Adapter
To program to the PROM using an EPROM programmer, use the socket adapter (manufacturer : Sun Hayato Co., Ltd.) listed below : Package Adapter socket part number LCC-32 (Square) ROM-32LC-28DP-S
Inquiry : Sun Hayato Co., Ltd. : TEL (81) -3-3986-0403 FAX (81) -3-5396-9106
3. Memory Space
Memory space in each mode, such as 32-Kbyte EPROM is diagrammed below.
Address 0000H
Single chip
Corresponding addresses on the EPROM programmer
I/O 0080H RAM 0480H Not available 8000H 0000H
PROM 32 KB
EPROM 32 KB
FFFFH
7FFFH
4. Programming to the EPROM
(1) (2) (3) Set the EPROM programmer for the MBM27C256A. Load program data into the EPROM programmer at 0000H to 7FFFH. Program with the EPROM programmer.
16
MB89120/120A Series
s BLOCK DIAGRAM
X0 X1
Main clock oscillator
Timebase timer
Clock controller X0A X1A Subclock oscillator (32.768 kHz) Internal bus
Reset circuit (WDT)
RST
8-bit timer/counter
P34/TO/INT0
CMOS I/O port Port 0/1 P00/(INT20) to 8 P07/(INT27) 8 P10 to P17
8-bit timer/counter External interrupt (Wake-up) 8-bit serial I/O Port 3
P33/EC/SCO
P30/SCK P32/SI P31/SO
External interrupt
P20 to P27
8
Port 2
Remote control transmission frequency generator CMOS output port Buzzer output CMOS I/O port
P35/INT1 P36/INT2
P37/BZ/(RCO)
RAM
N-ch open-drain output port Port 4 4 P40 to P43
F 2 M C- 8L CPU
RO M
The other pins MOD0, MOD1, VCC, VSS AVCC, AVR, AVSS
* : Only the MB89120A series has wake-up interrupt inputs and remote control transmission. Note : Parenthesized pins are available only with the MB89120A series.
17
MB89120/120A Series
s CPU CORE
1. Memory Space
The microcontrollers of the MB89120/A series offer 64 Kbytes of memory for storing all of I/O, data, and program areas. The I/O area is allocated from the lowest address. The data area is allocated immediately above the I/ O area. The data area can be divided into register, stack, and direct areas according to the application. The program area is allocated from exactly the opposite end of I/O area, that is, near the highest address. The tables of interrupt reset vectors and vector call instructions are allocated from the highest address with the program area. The memory space of the MB89120/A series is structured as illustrated below : Memory Space
MB89121 MB89P131 0000H I/O 007FH 0080H Not available 00BFH 00C0H 0100H Register 013FH 0140H 017FH 0180H 007FH 0080H 0000H
MB89123A MB89P133A 0000H I/O 007FH 0080H RAM 0100H Register 017FH 0180H Not available 0100H
MB89125A
MB89P135A
MB89PV130A
0000H I/O 007FH 0080H RAM 00FFH 0100H Register 01FFH 0200H 027FH 0280H Vacancy BFFFH C000H Register RAM 512 B I/O
0000H I/O 007FH 0080H RAM 1 KB 00FFH 0100H Register 01FFH 0200H 047FH 0480H 7FFFH 8000H
RAM
Not available BFFFH C000H
Vacancy
Not available DFFFH E000H EFFFH F000H ROM FFFFH FFFFH ROM
ROM
ROM 16 KB
External ROM 32 KB
FFFFH
FFFFH
FFFFH
18
MB89120/120A Series
2. Registers
The F2MC-8L family has two types of registers; dedicated hardware registers and general-purpose memory registers. The following dedicated registers are provided : A 16-bit register for indicating the instruction storage positions A 16-bi temporary register for arithmetic operations, etc. When the instruction is an 8-bit data processing instruction, the lower byte is used. Temporary accumulator (T) : A 16-bit register which is used for arithmetic operations with the accumulator When the instruction is an 8-bit data processing instruction, the lower byte is used. Index register (IX) : A 16-bit register for index modification Extra pointer (EP) : A 16-bit pointer for indicating a memory address Stack pointer (SP) : A 16-bit pointer for indicating a stack area Program status (PS) : A 16-bit register for storing a register pointer, a condition code Program counter (PC) : Accumulator (A) :
16 bits PC A T IX EP SP PS : Program counter : Accumulator
Initial value FFFDH Indeterminate
: Temporary accumulator Indeterminate : Index register : Extra pointer : Stack pointer : Program status Indeterminate Indeterminate Indeterminate I-flag = 0, IL1, 0 = 11 The other bit values are Indeterminate.
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for use as a condition code register (CCR) (see the diagram below) .
Structure of the Program Status Register
15 PS
14
13 RP
12
11
10
9
8
7 H
6 I
5
4
3 N
2 Z
1 V
0 C
Vacancy Vacancy Vacancy
IL1, 0
RP
CCR
19
MB89120/120A Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule illustrated below.
Rule for Conversion of Actual Addresses of the General-purpose Register Area
RP
Lower OP codes b1 b0
"0" "0" "0" "0" "0" "0" "0" "1" R4 R3 R2 R1 R0 b2
Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data, and bits for control of CPU operations at the time of an interrupt. H-flag : I-flag : IL1, 0 : Set to "1" when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared "0" otherwise. This flag is for decimal adjustment instructions. Interrupt is enabled when this flag is set to "1". Interrupt is disabled when the flag is cleared to "0". Cleared to "0" at the reset. Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is higher than the value indicated by this bit. IL1 0 0 1 1 N-flag : Z-flag : V-flag : C-flag : IL0 0 1 0 1 Interrupt level 1 2 3 Low High-low High
Set to "1" if the MSB becomes "1" as the result of an arithmetic operation. Cleared to "0" otherwise. Set to "1" when an arithmetic operation results in 0. Cleared to "0" otherwise. Set to "1" if the complement on "2" overflows as a result of an arithmetic operation. Cleared to "0" if the overflow does not occur. Set to "1" when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared to "0" otherwise. Set to the shift-out value in the case of a shift instruction.
20
MB89120/120A Series
The following general-purpose registers are provided : General-purpose registers : An 8-bit register for storing data The general-purpose registers are of 8 bits and located in the register banks of the memory. One bank contains 8 registers and up to a total of 8 banks can be used on the MB89121/P131, and a total of 16 banks can be used on the MB89123A/125A/P133A and a total of 32 banks can be used on the MB89P135A/PV130A. The bank currently in use is indicated by the register bank pointer (RP) . Register Bank Configuration
This address = 0100H + 8 x (RP) R0 R1 R2 R3 R4 R5 R6 R7 8 banks (MB89121/P131) 16 banks (MB89123A/125A/133A) 32 banks (MB89P135A/PV130A)
Memory area
21
MB89120/120A Series
s I/O MAP
Address 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) T2CR T1CR T2DR T1DR SMR1 SDR1 (R/W) (R/W) RCR1 RCR2 (R/W) SCGC (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (W) (R/W) (R/W) SYCC STBC WDTC TBTC WPCR PDR3 DDR3 PDR4 BZCR Read/Write (R/W) (W) (R/W) (W) (R/W) Register name PDR0 DDR0 PDR1 DDR1 PDR2 Register description Port 0 data register Port 0 data direction register Port 1 data register Port 1 data direction register Port 2 data register Vacancy Vacancy System clock control register Standby control register Watchdog control register Time-base timer control register Watch prescaler control register Port 3 data register Port 3 data direction register Port 4 data register Buzzer register Vacancy Vacancy Peripheral control clock register Vacancy Remote control transmission control register 1* Remote control transmission control register 2* Vacancy Vacancy Timer 2 control register Timer 1 control register Timer 2 data register Timer 1 data register Serial mode register Serial data register Vacancy Vacancy
(Continued)
22
MB89120/120A Series
(Continued) Address
20H 21H 22H 23H 24H 25H 26H to 31H 32H 33H 34H to 7BH 7CH 7DH 7EH 7FH * : Only for the MB89120A series Note : Do not use vacancies. (W) (W) (W) ILR1 ILR2 ILR3 (R/W) (R/W) EIE2 EIF2 (R/W) (R/W) EIC1 EIC2
Read/write
Register name Vacancy Vacancy Vacancy
Register description
External interrupt control register 1 External interrupt control register 2 Vacancy Vacancy External interrupt 2 enable register* External interrupt 2 flag register* Vacancy Interrupt level register 1 Interrupt level register 2 Interrupt level register 3 Vacancy
23
MB89120/120A Series
s ELECTRICAL CARACTERISTICS
1. Absolute Maximum Ratings
Parameter Symbol VCC AVCC AVR VPP VI VO IOL IOLAV IOL IOLAV IOH IOHAV IOH IOHAV PD TA Tstg Rating Min. VSS - 0.3 VSS - 0.6 VSS - 0.3 VSS - 0.3 -40 -55 Max. VSS + 7.2 VSS + 13.0 VCC + 0.3 VCC + 0.3 10 4 100 20 -10 -2 -30 -10 200 +85 +150 Unit (AVSS = VSS = 0.0 V) Remarks Use VCC, AVCC , and AVR set to the same voltage. MOD1 pin on the MB89P131/P133A/P135A
Power supply voltage
V
Program voltage Input voltage Output voltage "L" level maximum output current "L" level average output current "L" level total maximum output current "L" level total average output current "H" level maximum output current "H" level average output current "H" level total maximum output current "H" level total average output current Power consumption Operating temperature Storage temperature
V V V mA mA mA mA mA mA mA mA mW C C
Avarage value (operating current x operating rate)
Avarage value (operating current x operating rate) Avarage value (operating current x operating rate)
Avarage value (operating current x operating rate)
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
24
MB89120/120A Series
2. Recommended Operating Conditions
Parameter Symbol Value Min. 2.2 2.2 2.7 1.5 Operating temperature TA -40 Max. 6.0 4.0 6.0 6.0 +85 Unit V V V V C Remarks Normal operation assurance range * Applied to "Single-clock MB89121/123A/125A" Normal operation assurance range * Applied to "Dual-clock MB89121/123A/125A" Normal operation assurance range * Applied to "MB89P131/P133A/P135A/PV130A" Retains the RAM state in stop mode
(AVSS = VSS = 0.0 V)
Power supply voltage
VCC
* : These values vary with the operating conditions. See " Operating Voltage vs. Main Clock Operating Frequency." WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
25
MB89120/120A Series
* Operating Voltage vs. Main Clock Operating Frequency Dual-clock MB89121/123A/125A
6
Operating voltage (V)
5
4 Operation assurance range 3
2
1
1
2
3
4
Main clock operating frequency (Instruction cycle time of 4/FCH) (MHz) 4.0 Minimum execution time (s) 2.0 1.0
MB89P131/P133A/P135A/PV130A, and single-clock MB89121/123A/125A
6
Operating voltage (V)
5 Operation assurance range 4
3
2
1
1
2
3
4
Main clock oprating frequency (Instruction cycle time of 4/FCH) (MHz)
4.0 Minimum execution time (s)
2.0
1.0
Note : The shaded area is assured only for the MB89121/123A/125A (instruction cycle time of 4/FCH) . 26
MB89120/120A Series
3. DC Characteristics
Parameter Symbol VIH "H" level input voltage Pin P00 to P07, P10 to P17 (AVCC = VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Value Condition Unit Remarks Min. Typ. Max. 0.7 VCC VCC + 0.3 V INT20 to INT27 are available only for the MB89120A series.
VIHS
RST, P30 to P37, INT20 to INT27
0.8 VCC
VCC + 0.3
V
VIL "L" level input voltage
P00 to P07, P10 to P17
VSS - 0.3
0.3 VCC
V INT20 to INT27 are available only for the MB89120A series.
VILS
RST, P30 to P37, INT20 to INT27
VSS - 0.3
0.2 VCC
V
Open-drain output pin applied voltage "H" level output voltage
VD
P40 to P43 P00 to P07, P10 to P17, P20 to P27, P30 to P37 P00 to P07, P10 to P17 P20 to P27, P30 to P37, P40 to P43 RST P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P43, MOD0, MOD1 P00 to P07, P10 to P17, P30 to P37, P40 to P43, RST
VSS - 0.3
VCC + 0.3
V
VOH
IOH = -2.0 mA
2.4
V
"L" level output voltage
VOL
IOL = 1.8 mA
0.4
V
VOL2 Input leakage current (Hi-z output leakage current)
IOL = 4.0 mA
0.6
V
ILI
0.45 V < VI < VCC
5
A
Without pull-up resistor
Pull-up resistance
RPULL
VI = 0.0 V
25
50
100
k
(Continued)
27
MB89120/120A Series
(Continued)
Parameter Symbol Pin (AVCC = VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Value Condition Unit Remarks Min. Typ. Max. VCC = 5.0 V FCH = 4.00 MHz tinst*2 = 1.0 s VCC = 5.0 V FCH = 4.00 MHz Main sleep mode tinst*2 = 1.0 s VCC = 3.0 V FCL = 32.768 kHz Subclock mode VCC (External clock operation) VCC = 3.0 V FCL = 32.768 kHz Subclock sleep mode VCC = 3.0 V FCL = 32.768 kHz * Watch mode * Main clock stop mode at dual clock system TA = +25 C * Subclock stop mode * Main clock stop mode at single clock system Other than AVCC, AVSS, VCC, and VSS f = 1 MHz 4 7 mA MB89121/ 123A/125A
ICC1
6
10
MB89P131/ mA P133A/ P135A
ICCS1
2
5
mA

50
100
A
MB89121/ 123A/125A
ICCL
1
3
MB89P131/ mA P133A/ P135A A
Power supply current*1 ICCLS
25
50
ICCT
15
A
ICCH
1
A
Input capacitance
CIN
10
pF
*1 : The measurement conditions of power supply current is external clock. (VCC = 5.0 V, VCC = 3.0 V) *2 : For information on tinst, see " (4) Instruction Cycle" in "4. AC Characteristics."
28
MB89120/120A Series
4. AC Characteristics
(1) Reset Timing (VCC = +5.0 V 10%, AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Value Condition Unit Remarks Min. Max. 48 tHCYL* ns
Parameter RST "L" pulse width
Symbol tZLZH
* : tHCYL is the oscillation cycle (1/FCH) input to the X0.
tZLZH
RST
0.2 VCC
0.8 VCC 0.2 VCC
(2) Power-on Reset
Parameter Power supply rising time Power supply cut-off time
Symbol tR
Condition
(AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Value Unit Remarks Min. Max. 50 ms ms Power-on reset function only Due to repeated operations
tOFF 1
Note : Make sure that power supply rises within the oscillation stabilization time selected. For example, when the main clock is operating at FCH = 3 MHz and the oscillation stabilization time select option has been set to 212/FCH, the oscillation settling time is 1.4 ms and accordingly the maximum value of power supply rising time is about 1.4 ms. Keep in mind that rapid changes in power supply voltage may cause a power-on reset. If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended.
tR 2.0 V
tOFF
VCC
0.2 V
0.2 V
0.2 V
29
MB89120/120A Series
(3) Clock Timings Value Min. 1 238 72 Typ. 32.768 30.5 Max. 4.2 1000 24
(VSS = 0.0 V, TA = -40 C to +85 C) Symbol FCH FCL tHCYL tLCYL PWH1 PWL1 tCR1 tCF1 Pin X0, X1 X0A, X1A X0, X1 X0A, X1A X0 X0 Unit Remarks
Parameter Clock frequency Clock cycle time Input clock pulse width Input clock rising/falling time
MHz Main clock kHz ns s ns ns Subclock Main clock Subclock External clock External clock
X0, X1 Timings and Conditions of Applied Voltage
tHCYL 0.8 VCC 0.2 VCC
X0
PWH1
PWL1 tCF1
tCR1
Main Clock Conditions of Applied Voltage
When a crystal or ceramic resonator is used X0 X1
When an external clock is used X0 X1
FCH C0 C1 FCH
Open
30
MB89120/120A Series
X0A, X1A Timings and Conditions of Applied Voltage
tLCYL 0.8 VCC
X0A
Subclock Conditions of Applied Voltage
When a crystal or ceramic resonator is used X0A X1A
Single-clock option is used X0A X1A
Rd
Open
FCL C0 C1
(4) Instruction Cycles Parameter Instruction cycle (minimum execution time) Symbol Value (typical) 4/FCH, 8/FCH, 16/FCH, 64/FCH 2/FCL Unit s s
(VSS = 0.0 V, TA = -40 C to +85 C) Remarks (4/FCH) tinst = 1.0 s when operating at FCH = 4 MHz tinst = 61.036 s when operating at FCL = 32.768 kHz
tinst
31
MB89120/120A Series
(5) Recommended Resonator Manufacturers Sample Application of Piezoelectric Resonator (FAR Series) for Main Clock Oscillation Circuit
X0
X1 R FAR1
C12
C22
*1 : FUJITSU MEDIA DEVICE LIMITED Temperature Loading characteristics of FAR frequency capacitors*2 (TA = -20 C to +60 C)
FAR part number Frequency Dumping (built-in capacitor type) (MHz) resistor 1000 510 --
Initial deviation of FAR frequency (TA = +25 C)
FAR-C4CC-02000-L00 FAR-C4 A-03580- 01 FAR-C4CB-04000-M00
2.00 3.58 4.00
0.5%
0.5%
Built-in
Inquiry : FUJITSU MEDIA DEVICES LIMITED
32
MB89120/120A Series
Sample Application of Ceramic Resonator for Main Clock Oscillation Circuit
X0
X1 R
C1
C2
* Mask ROM products Resonator manufacturer* Kyocera Corporation Matsushita Electronic Components Resonator KBR-4.0MKS EFOV4004B CSBF1000J Murata Mfg. Co. Ltd. CSTCS4.00MG800 CSA4.00MG040 CST4.00MGW040 4.00 Frequency (MHz) 4.00 4.00 1.00 C1 (pF) 33 Built-in 100 Built-in 100 Built-in C2 (pF) 33 Built-in 100 Built-in 100 Built-in R (k) Not required 1.5 6.8 Not required Not required Not required
Inquiry : Kyocera Corporation * AVX Corporation North American Sales Headquarters : TEL (803) 448-9411 * AVX Limited European Sales Headquarters : TEL (01252) 770000 * AVX/Kyocera H.K. Ltd. Asian Sales Headquarters : TEL 363-3303 Matsushita Electronic Components Co., Ltd. * Ceramic Division : TEL 81-6-908-1101 Murata Mfg Co., Ltd. * Murata Electronics North America, Inc. : TEL 1-404-436-1300 * Murata Europe Management GmbH : TEL 49-911-66870 * Murata Electronics Singapore (Pte.) Ltd. : TEL 65-758-4233
33
MB89120/120A Series
Sample Application of Crystal Resonator for Subclock Oscillation Circuit
X0A
X1A Rd
C1
C2
* Mask ROM product Resonator manufacturer* SII Resonator DS-VT-200 Frequency (kHz) 32.768 C1 (pF) 24 C2 (pF) 24 Rd (k) 680
Inquiry : SII Seiko Instruments Inc. (Japan) : TEL 81-43-211-1219 Seiko Instruments U.S.A. Inc. : TEL 310-517-7770 Seiko Instruments GmbH : TEL 49-6102-297-122
34
MB89120/120A Series
(6) Serial I/O Timings
Parameter Serial clock cycle time SCK SO time Valid SI SCK SCK Valid SI hold time Serial clock "H" pulse width Serial clock "L" pulse width SCK SO time Valid SI SCK SCK Valid SI hold time
Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX
(VCC = +5.0 V 10%, AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Value Pin Condition Unit Remarks Min. Max. SCK SCK, SO SI, SCK SCK, SI SCK SCK, SO SI, SCK SCK, SI External clock operation Internal clock operation 2 tinst* -200 200 200 tinst* tinst* 0 200 200 200 200 s ns ns ns s s ns ns ns
* : For information on tinst, see " (4) Instruction Cycles." Internal Shift Clock Mode
tSCYC
SCK
2.4 V 0.8 V tSLOV 2.4 V 0.8 V tIVSH 0.8 VCC tSHIX 0.8 VCC 0.2 VCC 0.8 V
SO
SI
0.2 VCC
External Shift Clock Mode
tSLSH tSHSL 0.8 VCC 0.2 VCC tSLOV 2.4 V 0.8 V tIVSH 0.8 VCC tSHIX 0.8 VCC 0.2 VCC 0.2 VCC 0.8 VCC
SCK
SO
SI
0.2 VCC
35
MB89120/120A Series
(7) Peripheral Input Timings
Parameter Peripheral input "H" pulse width Peripheral input "L" pulse width
Symbol tILIH tIHIL
(VCC = +5.0 V 10%, AVSS = VSS = 0.0 V, TA = -40 C to +85 C) Value Pin Unit Remarks Min. Max. EC, INT0 to INT2 2 tinst* 2 tinst* s s
* : For information on tinst, see " (4) Instruction Cycle."
tIHIL
tILIH
EC INT0 to INT2
0.2 VCC
0.8 VCC 0.2 VCC
0.8 VCC
36
MB89120/120A Series
s EXAMPLE CHARACTERISTICS
(1) "L" Level Output Voltage
VOL vs. IOL
VOL (V) 1.1 TA = +25 C VCC = 2.2 V 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 1 2 345 VCC = 2.5 V VCC - VOH (V) 1.1 TA = +25 C VCC = 2.2 V 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0.0 -.5 -1.0 -1.5 -2.0 VCC = 2.5 V
(2) "H" Level Output Voltage
VCC - VOH vs. IOH
VCC = 3.0 V VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V
VCC = 3.0 V VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V
6
7
8
9 10 IOL (mA)
-2.5
-3.0 IOH (mA)
(3) "H" Level Input Voltage/"L" Level Input Voltage (CMOS Input)
VIN (V) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 .00 1.00 2.00 3.00 4.00 5.00 6.00 7.00 VCC (V)
(4) "H" Level Input Voltage/"L" Level Input Voltage (Hysteresis Input)
VIN (V) 5.0 4.5 TA = +25 C 4.0 VIHS 3.5 3.0 2.5 2.0 VILS 1.5 1.0 0.5 0 .00 1.00 2.00 3.00 4.00 5.00 6.00 7.00 VCC (V)
VIN vs. VCC
TA = +25 C
VIN vs. VCC
VIHS : Threshold when input voltage in hysteresis characteristics is set to "H" level VILS : Threshold when input voltage in hysteresis characteristics is set to "L" level
(5) Pull-up Resistance
RPULL (k) 1000
RPULL vs. VCC
TA = +25 C
300
100 50
10 0 1 2 3 4 5 6 7 VCC (V)
37
MB89120/120A Series
(6) Power Supply Current
ICC1 vs. VCC
ICC (mA) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) 0.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) Divide by 64 1.5 1.0 0.5 FCH = 4.0 MHz TA = +25 C Divide by 4 (ICC1) ICCS (mA) 3.0 2.5 2.0 Divide by 64 FCH = 4.0 MHz TA = +25 C Divide by 4 (ICCS1)
ICCS1 vs. VCC
ICCL vs. VCC
ICCL (A) 200 180 160 140 120 100 80 60 40 20 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) TA = +25 C ICCLS (A) 50 45 40 35 30 25 20 15 10 5
ICCLS vs. VCC
TA = +25 C
0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V)
ICCT vs. VCC
ICCT (A) 30 25 20 15 10 5 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) TA = +25 C ICCH (A) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 2.0 2.5 3.0
ICCH vs. VCC
TA = +25 C
3.5
4.0
4.5
5.0
5.5
6.0
6.5 VCC (V)
38
MB89120/120A Series
s MASK OPTIONS
Part number No. Specifying procedure Pull-up resistors * P00 to P07, P10 to P17, * P30 to P37, P40 to P43 Power-on reset Power-on reset provided No power-on reset MB89121 MB89123A MB89125A MB89P131 MB89P133A MB89P135A Set with EPROM programmer MB89PV130A Specification impossible
Specify when ordering masking
1
Selectable by pin All pins fixed to Selectable by pin (P40 to P43 must be set to without no pull-up resisa pull-up resistor.) tor optional Selectable Selectable Selectable With power-on reset
2
3
Selection of oscillation stabilization wait time * The oscillation stabilization wait time initial value is selectable from 4 types given below. Selectable 0 : Oscillation stabilization 22/FCH 1 : Oscillation stabilization 212/FCH 2 : Oscillation stabilization 216/FCH 3 : Oscillation stabilization 218/FCH Reset pin output * Reset output provided * No reset output Clock mode selection * Single-clock mode * Dual-clock mode Selectable
Selectable
Selectable
Oscillation stabilization 218/FCH
4
Selectable
Selectable
With reset output Dual-clock mode
5
Selectable
Selectable
Selectable
6
Main clock oscillation circuit type * External clock input Selectable * Oscillation resonator Peripheral control clock output function*2 * Not used * Used Selectable
Not required*1
7
Not required*3
*1 : Can be used as either crystal or ceramics oscillation. *2 : "Used" must be selected when P33 (39 pin) is used as SCO for the peripheral control clock output. *3 : The peripheral control clock function can be used only by software.
39
MB89120/120A Series
s MB89P131/P133A STANDARD OPTIONS
No. 1 2 3 4 5 Product option Pull-up resistor Power-on reset MB89P131-101 Not provided for any port Provided MB89P133A-201 Not provided for any port Provided
Selection of oscillation stabilization 2 : Oscillation stabilization 216/FCH 2 : Oscillation stabilization 216/FCH time Reset pin output Clock mode selection Provided Dual-clock mode Provided Dual-clock mode
s ORDERING INFORMATION
Part number MB89121PFM MB89123APFM MB89125APFM MB89P131PFM-101 MB89P133APFM-201 MB89P135APFM MB89PV130ACF-ES Package Remarks
48-pin Plastic QFP (FPT-48P-M13)
48-pin Ceramic MQFP (MQP-48C-P01)
40
MB89120/120A Series
s PACKAGE DIMENSION
48-pin Plastic QFP (FPT-48P-M13)
13.100.40(.516.016)SQ 10.000.20(.394.008)SQ
36 25
0.170.06 (.007.002)
37
24
Details of "A" part 0.10(.004) 1.95 -0.20 .077 -.008
+0.40 +.016
(Mounting height)
INDEX 0~8
48 13
0.25(.010)
1
12
"A"
0.800.20 (.031.008) 0.880.15 (.035.006)
0.20 -0.20
+0.10 +.004
.008 -.008 (Stand off)
0.80(.031)
0.320.05 (.013.002)
0.20(.008)
M
C
2001 FUJITSU LIMITED F48023S-c-2-3
Dimensions in mm (inches)
41
MB89120/120A Series
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
F0110 (c) FUJITSU LIMITED Printed in Japan

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